View source code
Display the source code in core/atomic.d from which this page was generated on github.
Report a bug
If you spot a problem with this page, click here to create a Bugzilla issue.
Improve this page
Quickly fork, edit online, and submit a pull request for this page. Requires a signed-in GitHub account. This works well for small changes. If you'd like to make larger changes you may want to consider using local clone.

Enum core.atomic.MemoryOrder

Specifies the memory ordering semantics of an atomic operation.

enum MemoryOrder : int { ... }

Enum members

NameDescription
acq Hoist-load + hoist-store barrier. Corresponds to LLVM AtomicOrdering.Acquire and C++11/C11 memory_order_acquire.
acq_rel Acquire + release barrier. Corresponds to LLVM AtomicOrdering.AcquireRelease and C++11/C11 memory_order_acq_rel.
raw Not sequenced. Corresponds to LLVM AtomicOrdering.Monotonic and C++11/C11 memory_order_relaxed.
rel Sink-load + sink-store barrier. Corresponds to LLVM AtomicOrdering.Release and C++11/C11 memory_order_release.
seq Fully sequenced (acquire + release). Corresponds to LLVM AtomicOrdering.SequentiallyConsistent and C++11/C11 memory_order_seq_cst.

See Also

Authors

Sean Kelly, Alex Rønne Petersen, Manu Evans

License

Boost License 1.0