Display the source code in core/cpuid.d from which this page was generated on github.

If you spot a problem with this page, click here to create a Bugzilla issue.

Quickly fork, edit online, and submit a pull request for this page. Requires a signed-in GitHub account. This works well for small changes. If you'd like to make larger changes you may want to consider using local clone.

Struct `core.cpuid.CacheInfo`

Cache size and behaviour


						
				struct CacheInfo
				;

Fields

Name	Type	Description
`associativity`	`ubyte`	Number of ways of associativity, eg: 1 = direct mapped 2 = 2-way set associative 3 = 3-way set associative ubyte.max = fully associative
`lineSize`	`uint`	Number of bytes read into the cache when a cache miss occurs.
`size`	`ulong`	Size of the cache, in kilobytes, per CPU. For L1 unified (data + code) caches, this size is half the physical size. (we don't halve it for larger sizes, since normally data size is much greater than code size for critical loops).

Authors

Don Clugston, Tomas Lindquist Olsen <[email protected]>

License

Boost License 1.0